1High-performanceEE-based CPLDATF1516ASATF1516ASLPreliminaryFeatures• High-density, High-performance, Electrically-erasable ComplexProgrammable Logic
ATF1516AS(L)10PCI ComplianceThe ATF1516AS also supports the growing need in theindustry to support the new peripheral component intercon-nect (PCI) in
ATF1516AS(L)11Using “C” Product for IndustrialTo use commercial product for Industrial temperature ranges, down-grade one speed grade from the “I” to
ATF1516AS(L)12Packaging Information1.218(30.95)1.238(31.45)SQ.008(0.20).016(0.40)PIN 1 ID.0256(0.65) BSC1.098(27.90)1.106(28.10)SQ.127(3.22).157(3.97)
© Atmel Corporation 2000.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa
ATF1516AS(L)2Block Diagram6 to 12EFGHMNOPLKJI256
ATF1516AS(L)3DescriptionThe ATF1516AS is a high-performance, high-density com-plex programmable logic device (CPLD) that utilizesAtmel’s proven electr
ATF1516AS(L)4Product Terms and Select MUXEach ATF1516AS macrocell has five product terms. Eachproduct term receives as its inputs all signals from bo
ATF1516AS(L)5Programmable Pin-keeper Option for Inputs and I/OsThe ATF1516AS offers the option of programming all inputand I/O pins so that “pin keepe
ATF1516AS(L)6process users may configure the device with the Power-upReset hysteresis set to Large or Small. Atmel POF2JEDusers may select the Large o
ATF1516AS(L)7Input Test Waveforms and Measurement LevelsrR, tF = 1.5 ns typicalOutput AC Test Loads:Note: *Numbers in parenthesis refer to 3.0V operat
ATF1516AS(L)8JTAG-BST OverviewThe JTAG boundary-scan testing is controlled by the TestAccess Port (TAP) controller in the ATF1516AS. Theboundary-scan
ATF1516AS(L)9BSC Configuration for Macrocell01DQ0101DQDQCaptureDRCaptureDRUpdateDR0101DQDQTDITDIOUTJOEJShiftShiftClockClockModeTDOTDOPin BSCMacrocell
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