Rainbow-electronics AT25040 Uživatelský manuál stáhnout pdf

Features

• Serial Peripheral Interface (SPI) Compatible

• Supports SPI Modes 0 (0,0) and 3 (1,1)

• Medium-voltage and Standard-voltage Operation

– 5.0 (V

= 4.5V to 5.5V)

– 2.7 (V

= 2.7V to 5.5V)

• 3.0 MHz Clock Rate (5V)

• 8-byte Page Mode

• Block Write Protection

– Protect 1/4, 1/2, or Entire Array

• Write Protect (WP) Pin and Write Disable Instructions for

Both Hardware and Software Data Protection

• Self-timed Write Cycle (10 ms max)

• High Reliability

– Endurance: One Million Write Cycles

– Data Retention: 100 Years

• 8-pin PDIP and 8-lead JEDEC SOIC Package

Description

The AT25010/020/040 provides 1024/2048/4096 bits of serial electrically erasable

programmable read only memory (EEPROM) organized as 128/256/512 words of 8

bits each. The device is optimized for use in many automotive applications where low-

power and low voltage operation are essential. The AT25010/020/040 is available in

space saving 8-pin PDIP and 8-lead JEDEC SOIC packages.

The AT25010/020/040 is enabled through the Chip Select pin (CS

) and accessed via a

3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and

Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-

rate ERASE cycle is required before WRITE.

BLOCK WRITE protection is enabled by programming the status register with one of

four blocks of write protection. Separate program enable and program disable instruc-

tions are provided for additional data protection. Hardware data protection is provided

via the WP

pin to protect against inadvertent write attempts. The HOLD pin may be

used to suspend any serial communication without resetting the serial sequence.

SPI Serial

Automotive

EEPROMs

1K (128 x 8)

2K (256 x 8)

4K (512 x 8)

AT25010

AT25020

AT25040

SPI, 1K Serial

PROM

Pin Configurations

Pin Name Function

Chip Select

SCK Serial Data Clock

SI Serial Data Input

SO Serial Data Output

GND Ground

VCC Power Supply

Write Protect

HOLD

Suspends Serial Input

8-pin PDIP

GND

VCC

HOLD

SCK

8-lead SOIC

GND

VCC

HOLD

SCK

Rev. 3259C–SEEPR–06/03

1 2 3 4 5 6 ... 17 18

Shrnutí obsahu

Strany 1 - Pin Configurations

1Features• Serial Peripheral Interface (SPI) Compatible• Supports SPI Modes 0 (0,0) and 3 (1,1)• Medium-voltage and Standard-voltage Operation– 5.0 (V

Strany 2

10AT25010/020/0403259C–SEEPR–06/03Timing DiagramsSynchronous Data Timing (for mode 0)WREN Timing WRDI Timing SOVOHVOLHI-ZHI-ZtVVALID INSIVIHVILtHtSU

Strany 3

11AT25010/020/0403259C–SEEPR–06/03RDSR Timing WRSR Timing READ Timing CSSCK01234567891011121314SIINSTRUCTIONSO76543210DATA OUTMSBHIGH IMPEDANCE15CS

Strany 4

12AT25010/020/0403259C–SEEPR–06/03WRITE Timing HOLD Timing CSSCK01234567891011121314SIINSTRUCTIONSO76543210DATA INHIGH IMPEDANCE15 16 17 18 19 20 21

Strany 5

13AT25010/020/0403259C–SEEPR–06/03 AT25010 Ordering InformationOrdering Code Package Operation RangeAT25010-10PA-5.0CAT25010N-10SA-5.0C8P38S1Automotiv

Strany 6

14AT25010/020/0403259C–SEEPR–06/03 AT25020 Ordering InformationOrdering Code Package Operation RangeAT25020-10PA-5.0CAT25020N-10SA-5.0C8P38S1Automotiv

Strany 7

15AT25010/020/0403259C–SEEPR–06/03 AT25040 Ordering InformationOrdering Code Package Operation RangeAT25040-10PA-5.0CAT25040N-10SA-5.0C8P38S1Automoti

Strany 8

16AT25010/020/0403259C–SEEPR–06/03Packaging Information8P3 – PDIP 2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8P3, 8-lead, 0.300&qu

Strany 9

17AT25010/020/0403259C–SEEPR–06/038S1 – JEDEC SOIC 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. Note:10/10/018S1, 8-lead (0.150&q

Strany 10 - AT25010/020/040

Printed on recycled paper.3259C–SEEPR–06/03 xMDisclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly

Strany 11

2AT25010/020/0403259C–SEEPR–06/03Block Diagram Absolute Maximum Ratings*Operating Temperature... -55°C to + 125°C*NOTIC

Strany 12

3AT25010/020/0403259C–SEEPR–06/03Note: 1. This parameter is characterized and is not 100% tested.Notes: 1. This parameter is preliminary and Atmel may

Strany 13

4AT25010/020/0403259C–SEEPR–06/03Note: 1. This parameter is characterized and is not 100% tested.AC Characteristics Applicable over recommended operat

Strany 14

5AT25010/020/0403259C–SEEPR–06/03Serial Interface DescriptionMASTER: The device that generates the serial clock.SLAVE: Because the Serial Clock pin (S

Strany 15

6AT25010/020/0403259C–SEEPR–06/03SPI Serial Interface

Strany 16

7AT25010/020/0403259C–SEEPR–06/03Functional DescriptionThe AT25010/020/040 is designed to interface directly with the synchronous serialperipheral int

Strany 17

8AT25010/020/0403259C–SEEPR–06/03WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user toselect one of four levels of protection. The AT2

Strany 18 - Regional Headquarters

9AT25010/020/0403259C–SEEPR–06/03The AT25010/020/040 is capable of an 8-byte PAGE WRITE operation. After each byteof data is received, the three low o

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