Rainbow-electronics DS2430A Uživatelský manuál

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1 of 16 022002
FEATURES
§ 256-bit Electrically Erasable Programmable
Read Only Memory (EEPROM) plus 64-bit
one-time programmable application register
§ Unique, factory-lasered and tested 64-bit
registration number (8-bit family code + 48-bit
serial number + 8-bit CRC tester) assures
absolute identity because no two parts are alike
§ Built-in multidrop controller ensures
compatibility with other MicroLAN products
§ EEPROM organized as one page of 32 bytes
for random access
§ Reduces control, address, data, and power to a
single data pin
§ Directly connects to a single port pin of a
microprocessor and communicates at up to
16.3kbits per second
§ 8-bit family code specifies DS2430A
communication requirements to reader
§ Presence detector acknowledges when reader
first applies voltage
§ Low cost TO-92 or 6-pin TSOC surface mount
package
§ Reads and writes over a wide voltage range of
2.8V to 6.0V from -40°C to +85°C
ORDERING INFORMATION
DS2430A TO-92 package
DS2430AP 6-pin TSOC package
DS2430A/T&R Tape & Reel version of
DS2430A
DS2430AP/T&R Tape & Reel version of
DS2430AP
DS2430AX Chip Scale Pkg., 10k Tape
& Reel
DS2430AX-S Chip Scale Pkg., 2.5k Tape
& Reel
PIN ASSIGNMENT
PIN DESCRIPTION
TO-92 TSOC
Pin 1 Ground Ground
Pin 2 Data Data
Pin 3 NC NC
Pin 4 –––– NC
Pin 5 –––– NC
Pin 6 ––––
DS2430
A
256-Bit 1-Wire EEPROM
www.maxim-ic.com
1
2
3
6
5
4
TOP VIEW
3.7mm x 4.0mm x 1.5mm
SIDE VIEW
See Mech.
Drawing Section
TSOC PACKAGE
BOTTOM VIEW
See Mech.
Drawings Section
TO-92
DALLAS
DS2430A
2 3
1
1 2 3
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Shrnutí obsahu

Strany 1 - 256-Bit 1-Wire EEPROM

1 of 16 022002FEATURES§ 256-bit Electrically Erasable ProgrammableRead Only Memory (EEPROM) plus 64-bitone-time programmable application register§ U

Strany 2 - 64-BIT LASERED ROM

DS2430A10 of 16ROM FUNCTIONS FLOW CHART Figure 8

Strany 3

DS2430A11 of 16Transaction SequenceThe sequence for accessing the DS2430A via the 1-Wire port is as follows:§ Initialization§ ROM Function Command§

Strany 4 - 1-WIRE CRC GENERATOR Figure 4

DS2430A12 of 16After one complete pass, the bus master knows the contents of the ROM in one device. The remainingnumber of devices and their ROM codes

Strany 5 - READ SCRATCHPAD [AAh]

DS2430A13 of 16READ/WRITE TIMING DIAGRAM Figure 10Write-0 Time SlotWrite-1 Time SlotRead-data Time Slot

Strany 6 - READ MEMORY [F0h]

DS2430A14 of 16MEMORY FUNCTION EXAMPLEExample: Write 2 data bytes to data memory location 0006 and 0007. Read entire data memory.MASTER MODE DATA (LSB

Strany 7 - READ STATUS REGISTER [66h]

DS2430A15 of 16ABSOLUTE MAXIMUM RATINGS*Voltage on DATA to Ground -0.5V to +7.0VOperating Temperature Range -40°C to +85°CStorage Temperature Range -5

Strany 8

DS2430A16 of 16NOTES:1) All voltages are referenced to ground.2) VPUP = external pullup voltage.3) Input load is to ground.4) An additional reset

Strany 9 - Hardware Configuration

DS2430A2 of 16SILICON LABEL DESCRIPTIONThe DS2430A 256-bit 1-Wire EEPROM identifies and stores relevant information about the product towhich it is as

Strany 10 - 10 of 16

DS2430A3 of 16DS2430A BLOCK DIAGRAM Figure 1

Strany 11 - 11 of 16

DS2430A4 of 16HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 264-BIT LASERED ROM Figure 38-Bit CRC Code 48-Bit Serial Number 8-Bit Family Code (14H

Strany 12 - Read/Write Time Slots

DS2430A5 of 16MEMORYThe memory of the DS2430A consists of three separate sections, called data memory, applicationregister, and status register (Figur

Strany 13 - Read-data Time Slot

DS2430A6 of 16MEMORY FUNCTION FLOW CHART Figure 6COPY SCRATCHPAD [55h]After the data stored in the scratchpad has been verified the master may send th

Strany 14 - MEMORY FUNCTION EXAMPLE

DS2430A7 of 16MEMORY FUNCTION FLOW CHART Figure 6 (cont’d)WRITE APPLICATION REGISTER [99h]This command is essentially the same as the Write Scratchpad

Strany 15 - 15 of 16

DS2430A8 of 16MEMORY FUNCTION FLOW CHART Figure 6 (cont’d)READ APPLICATION REGISTER [C3h]This command is used to read the application register or the

Strany 16 - 16 of 16

DS2430A9 of 161-WIRE BUS SYSTEMThe 1-Wire bus is a system that has a single bus master and one or more slaves. In all instances, theDS2430A is a slave

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