Rainbow-electronics ADC1038 Uživatelský manuál stáhnout pdf (Strana 3)

Electrical Characteristics (Continued)

The following specifications apply for V

CC

ea

5.0V, V

REF

ea

4.6V, f

S

e

700 kHz, and f

C

e

3 MHz unless otherwise

specified. Boldface limits apply for T

A

e

T

J

e

T

MIN

to T

MAX

; all other limits T

A

e

T

J

e

25

§

C.

Symbol Parameter Conditions

Typical Limit Units

(Note 8) (Note 9) (Limits)

DIGITAL AND DC CHARACTERISTICS

V

IN(1)

Logical ‘‘1’’ Input Voltage V

CC

e

5.25 V

DC

2.0 V (min)

V

IN(0)

Logical ‘‘0’’ Input Voltage V

CC

e

4.75 V

DC

0.8 V (max)

I

IN(1)

Logical ‘‘1’’ Input Current V

IN

e

5.0 V

DC

0.005 2.5 mA (max)

I

IN(0)

Logical ‘‘0’’ Input Current V

IN

e

0V

DC

b

0.005

b

2.5 mA (max)

V

OUT(1)

Logical ‘‘1’’ Output Voltage V

CC

e

4.75 V

DC

I

OUT

eb

360 mA 2.4 V (min)

I

OUT

eb

10 mA 4.5 V (min)

V

OUT(0)

Logical ‘‘0’’ Output Voltage V

CC

e

4.75 V

DC

0.4 V (max)

I

OUT

e

1.6 mA

I

OUT

TRI-STATE Output Current V

OUT

e

0V

b

0.01

b

3 mA (max)

V

OUT

e

5V 0.01 3 mA (max)

I

SOURCE

Output Source Current V

OUT

e

0V

b

14

b

6.5 mA (min)

I

SINK

Output Sink Current V

OUT

e

V

CC

16 8.0 mA (min)

I

CC

Supply Current CS

e

HIGH, V

REF

Open 1.5 3 mA (max)

AC CHARACTERISTICS

f

C

Conversion Clock (C

CLK

) 0.7 MHz (min)

Frequency 4.0 3.0 MHz (max)

f

S

Serial Data Clock (S

CLK

)f

C

e

3 MHz, R/L

e

‘‘0’’ 183 kHz (min)

Frequency (Note 13) f

C

e

3 MHz, R/L

e

‘‘1’’ 622 kHz (min)

f

C

e

3 MHz, R/L

e

‘‘0’’ or R/L

e

‘‘1’’ 2 1.0 MHz (max)

T

C

Conversion Time Not Including MUX Addressing and 41 (1/f

C

)

(max)

Analog Input Sampling Times

a

200 ns

t

CA

Analog Sampling Time After Address is Latched,CS

e

Low 4.5 (1/f

S

)

(max)

a

200 ns

t

ACC

Access Time Delay from CS or OE OE

e

‘‘0’’

100 200 ns (max)

Falling Edge to DO Data Valid

t

SET-UP

Set-up Time of CS Falling

75 150 ns (min)

Edge to S

CLK

Rising Edge

t

1H

,t

0H

Delay from OE or CS Rising R

L

e

3kX,C

L

e

100 pF

100 120 ns (max)

Edge to DO TRI-STATE

t

HDI

DI Hold Time from S

CLK

Rising Edge 0 50 ns (min)

t

SDI

DI Set-up Time to S

CLK

Rising Edge 50 100 ns (min)

3

1 2 3 4 5 6 7 8 ... 17 18

Komentáře k této Příručce

Žádné komentáře