Rainbow-electronics ATmega8L Uživatelský manuál

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Features
High-performance, Low-power AVR
®
8-bit Microcontroller
Advanced RISC Architecture
130 Powerful Instructions – Most Single-clock Cycle Execution
32 x 8 General Purpose Working Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-chip 2-cycle Multiplier
Nonvolatile Program and Data Memories
8K bytes of In-System Self-Programmable Flash
Endurance: 1,000 Write/Erase Cycles
Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
512 Bytes EEPROM
Endurance: 100,000 Write/Erase Cycles
1K Byte Internal SRAM
Programming Lock for Software Security
Peripheral Features
Two 8-bit Timer/Counters with Separate Prescaler, one Compare Mode
One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
Real Time Counter with Separate Oscillator
Three PWM Channels
8-channel ADC in TQFP and MLF package
6 Channels 10-bit Accuracy
2 Channels 8-bit Accuracy
6-channel ADC in PDIP package
4 Channels 10-bit Accuracy
2 Channels 8-bit Accuracy
Byte-oriented 2-wire Serial Interface
Programmable Serial USART
Master/Slave SPI Serial Interface
Programmable Watchdog Timer with Separate On-chip Oscillator
On-chip Analog Comparator
Special Microcontroller Features
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated RC Oscillator
External and Internal Interrupt Sources
Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down and
Standby
I/O and Packages
23 Programmable I/O Lines
28-lead PDIP, 32-lead TQFP, and 32-pad MLF
Operating Voltages
2.7 - 5.5V (ATmega8L)
4.5 - 5.5V (ATmega8)
Speed Grades
0 - 8 MHz (ATmega8L)
0 - 16 MHz (ATmega8)
Power Consumption
Active: TBD
Idle Mode: TBD
Power-down Mode: TBD
Rev. 2486AS - 08/01
8-bit
Microcontroller
with 8K Bytes
In-System
Programmable
Flash
ATmega8
ATmega8L
Advance
Information
Summary
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ava ila ble on ou r web site at www.atmel.com.
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Shrnutí obsahu

Strany 1 - Features

1Features• High-performance, Low-power AVR® 8-bit Microcontroller• Advanced RISC Architecture– 130 Powerful Instructions – Most Single-clock Cycle Exe

Strany 2 - Pin Configurations

10ATmega82486AS–08/01CLH Clear Half Carry Flag in SREG H ← 0 H 1MCU CONTROL INSTRUCTIONSNOP No Operation None 1SLEEP Sleep (see specific descr. for S

Strany 3

11ATmega82486AS–08/01Ordering InformationSpeed (MHz) Power Supply Ordering Code Package Operation Range2.7 - 5.5 8 ATmega8L-8ACATmega8L-8PCATmega8L-8M

Strany 4 - Pin Descriptions

12ATmega82486AS–08/01Packaging Information32A8.75 (0.344) 8.75 (0.344)0.45 (0.018)0.30 (0.012)PIN 1 ID0.80 (0.0315) BSC 6.90 (0.272)0.20 (0.008)0.09 (

Strany 5

13ATmega82486AS–08/0128P334.80(1.370)34.54(1.360)8.26(0.325)7.62(0.300)10.20(0.400)MAX0.38(0.015)2.54(0.100)BSC3.56(0.140)3.05(0.120)4.57(0.180)MAX0º~

Strany 6

14ATmega82486AS–08/0132M1-APIN 1 ID 2325 Orchard Parkway San Jose, CA 95131TITLE32M1-ARDRAWING NO. REV R32M1-A, 32-pad, 5x5x1.0mm body, L

Strany 7 - Register Summary (Continued)

© Atmel Corporation 2001.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa

Strany 8 - << 1 Z,C 2

2ATmega82486AS–08/01Pin Configurations123456782423222120191817(INT1) PD3(XCK/T0) PD4GNDVCCGNDVCC(XTAL1/TOSC1) PB6(XTAL2/TOSC2) PB7PC1 (ADC1)PC0 (ADC0)

Strany 9

3ATmega82486AS–08/01Overview The ATmega8 is a low-power CMOS 8-bit microcontroller based on the AVR RISCarchitecture. By executing powerful instructio

Strany 10 - (Continued)

4ATmega82486AS–08/01The AVR core combines a rich instruction set with 32 general purpose working registers.All the 32 registers are directly connected

Strany 11 - °C to 85°C)

5ATmega82486AS–08/01If the Internal Calibrated RC oscillator is used as chip clock source, PB7..6 is used asTOSC2..1 input for the Asynchronous Timer/

Strany 12 - 7.10 (0.280)

6ATmega82486AS–08/01Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page0x3F (0x5F) SREG I T H S V N Z C 70x3E (0x5E) SP

Strany 13 - 28-lead, Plastic Dual Inline

7ATmega82486AS–08/01Notes: 1. Refer to the USART description for details on how to access UBRRH and UCSRC.2. For compatibility with future devices, re

Strany 14 - PIN 1 ID

8ATmega82486AS–08/01Instruction Set Summary Mnemonics Operands Description Operation Flags #ClocksARITHMETIC AND LOGIC INSTRUCTIONSADD Rd, Rr Add two

Strany 15 - 2486AS–08/01

9ATmega82486AS–08/01BRIE k Branch if Interrupt Enabled if ( I = 1) then PC ← PC + k + 1 None 1 / 2BRID k Branch if Interrupt Disabled if ( I = 0) th

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