Rainbow-electronics DS89C450 Uživatelský manuál Strana 1

1 of 48 REV: 111003 Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 10 of 48 Figure 4. Serial Port Timing tXLXLtXHDVtXHDXtXHQXtQVXHTRANSMITRECEIVEALE

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 11 of 48 POWER-CYCLE TIMING CHARACTERISTICS (VCC = 4.5V to 5.5V, TO = -40°C to +8

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 12 of 48 PIN DESCRIPTION PIN PDIP PLCC TQFP NAME FUNCTION 40 12, 44 6, 38 VCC

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 13 of 48 PIN DESCRIPTION (continued) PIN PDIP PLCC TQFP NAME FUNCTION 1 2 40 P

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 14 of 48 Figure 5. Functional Diagram CONTROL AND SEQUENCER INTERNAL REGISTERS D

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 15 of 48 Terminology The term DS89C430 is used in the remainder of the document t

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 16 of 48 All standard SFR locations from the 8051 are duplicated in the DS89C430,

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 17 of 48 Table 1. SFR Register Map (continued) REGISTER ADDRESS BIT 7 BIT 6 B

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 18 of 48 Table 2. SFR Reset Value REGISTER ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 19 of 48 Table 2. SFR Reset Value (continued) REGISTER ADDRESS BIT 7 BIT 6 BIT

DS89C430/DS89C44/DS89C450 Ultra-High-Speed Flash Microcontrollers 2 of 48 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground -0.3

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 20 of 48 Figure 6. Memory Map (as shown for the DS89C430) ExternalDataMemory 8K

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 21 of 48 Program Memory Access On-chip program memory begins at address 0000h and

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 22 of 48 fetch that takes four clocks. Page mode 1 is the only external addressin

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 23 of 48 Note: The read/write accessibility of the flash memory during in-applica

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 24 of 48 Table 4. In-Application Programming Commands FC3:FC0 COMMAND OPERATION

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 25 of 48 ROM Loader The full on-chip flash program memory space, security flash b

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 26 of 48 Table 5. Parallel Programming Instruction Set INSTRUCTION P2.5:0, P1.7:0

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 27 of 48 DPTR instruction decrements the DPTR1 contents by 1. With this feature,

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 28 of 48 Figure 7. External Program Memory Access (Nonpage Mode, CD1:CD0 = 10) I

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 29 of 48 The following diagrams illustrate the timing relationship for external d

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 3 of 48 Note 1: Specifications to -40°C are guaranteed by design and not producti

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 30 of 48 Page Mode, External Memory Cycle Page mode retains the basic circuitry r

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 31 of 48 Figure 10. Page Mode 1, External Memory Cycle (CD1:CD0 = 10) Internal M

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 32 of 48 Note that there are a few exceptions for this mode of operation when PAG

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 33 of 48 Table 8. Page Mode 1, Data Memory Cycle Stretch Values (PAGES1:PAGES0 =

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 34 of 48 Table 11. Page Mode 2, Data Memory Cycle Stretch Values (PAGES1:PAGES0 =

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 35 of 48 Figure 12. Page Mode 1, External Data Memory Access (PAGES = 01, STRETC

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 36 of 48 Figure 13. Page Mode 1, External Data Memory Access (PAGES = 01, Stretch

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 37 of 48 Interrupt Priority There are five levels of interrupt priority: Level 4

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 38 of 48 Timer/Counters The DS89C430 incorporates three 16-bit timers. All three

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 39 of 48 during the three machine cycles following the writing of the 55h. Writin

DS89C430/DS89C440/DS89C450 4 of 48 AC CHARACTERISTICS (VCC = 4.5V to 5.5V, TO = -40°C to +85°C.) (See Figure 1, Figure 2, and Figure 3.) 1-CYCLE PAG

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 40 of 48 Figure 14. System Clock Sources 4X/2X CTM CRYSTAL OSCILLATOR DIVIDE 102

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 41 of 48 Watchdog Timer The watchdog timer functions as the source of both the wa

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 42 of 48 External/Hardware Reset A hardware reset can be initiated by asserting t

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 43 of 48 Serial ports and timers track the oscillator cycles per machine cycle wh

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 44 of 48 Stop Mode Stop mode disables all circuits within the processor. All on-c

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 45 of 48 PIN CONFIGURATIONS REVISION HISTORY D

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 46 of 48 PACKAGE INFORMATION (The package drawing(s) in this data sheet may not r

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 47 of 48 PACKAGE INFORMATION (continued) (The package drawing(s) in this data she

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry o

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 5 of 48 AC CHARACTERISTICS (continued) (VCC = 4.5V to 5.5V, TO = -40°C to +85°C.)

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 6 of 48 AC CHARACTERISTICS (continued) (VCC = 4.5V to 5.5V, TO = -40°C to +85°C.)

DS89C430/DS89C440/DS89C450 7 of 48 Note 15: The clock divide and crystal multiplier control bits in the PMR register determine the system clock freq

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 8 of 48 Figure 2. Page Mode 1 Timing ALE Port 0 Port 2 LSB DATA XTAL1 PSEN RD

DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers 9 of 48 EXTERNAL CLOCK CHARACTERISTICS (VCC = 4.5V to 5.5V, TO = -40°C to +85°C.)