MAX1208
12-Bit, 80Msps, 3.3V ADC
6 _______________________________________________________________________________________
Note 1: Specifications ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: See definitions in the Parameter Definitions section.
Note 3: During power-down, D11–D0, DOR, and DAV are high impedance.
Note 4: Guaranteed by design and characterization.
Note 5: Digital outputs settle to V
IH
or V
IL
.
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 80MHz (50% duty cycle), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
Normal operating mode,
f
IN
= 32.5MHz at -0.5dBFS, OV
DD
= 2.0V,
C
L
≈ 5pF
9.9 mA
Digital Output Supply Current I
OVDD
Power-down mode clock idle, PD = OV
DD
0.9 µA
TIMING CHARACTERISTICS (Figure 6)
Clock Pulse Width High t
CH
ns
Data-Valid Delay t
DAV
C
L
= 5pF (Note 5) 6.4 ns
Data Setup Time Before Rising
Edge of DAV
t
SETUP
C
L
= 5pF (Note 4, Note 5) 7.7 ns
Data Hold Time After Rising Edge
of DAV
t
HOLD
C
L
= 5pF (Note 4, Note 5) 4.2 ns
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