Rainbow-electronics W78C52D Uživatelský manuál Strana 1

Preliminary W78C52D8-BIT MICROCONTROLLERPublication Release Date: December 1998- 1 - Revision A1GENERAL DESCRIPTIONThe W78C52D microcontroller supplie

Preliminary W78C52D- 10 -DC Characteristics, continuedPARAMETER SYM. SPECIFICATION TEST CONDITIONSMIN. MAX. UNITInputInput High VoltageP1, P2, P3, P4

Preliminary W78C52DPublication Release Date: December 1998- 11 - Revision A1AC CHARACTERISTICSThe AC specifications are a function of the particular p

Preliminary W78C52D- 12 -Data Read CyclePARAMETER SYMBOL MIN. TYP. MAX. UNIT NOTESALE Low to RD LowTDAR3 TCP-∆-3 TCP+∆nS 1, 2RD Low to Data ValidTDD

Preliminary W78C52DPublication Release Date: December 1998- 13 - Revision A1TIMING WAVEFORMSProgram Fetch CycleS1XTAL1S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6

Preliminary W78C52D- 14 -Timing Waveforms, continuedData Write CycleS2 S3S5 S6 S1S2 S3 S4S1S5 S6S4XTAL1ALE PSENA8-A15DATA OUTPORT 2PORT 0 A0-A7 WRTTDA

Preliminary W78C52DPublication Release Date: December 1998- 15 - Revision A1APPLICATION CIRCUITSExpanded External Program Memory and CrystalAD0A0A0A0

Preliminary W78C52D- 16 -Application Circuits, continuedExpanded External Data Memory and Oscillator10 u8.2 KDDOSCILLATOREA 31XTAL1 19XTAL2 18RST 9IN

Preliminary W78C52DPublication Release Date: December 1998- 17 - Revision A1PACKAGE DIMENSIONS40-pin DIPSeating Plane1. Dimension D Max. & S inclu

Preliminary W78C52D- 18 -Package Dimensions, continued44-pin QFPSeating Plane112212See Detail FebAy1AALL1cEEH1D44HD3433Detail F1. Dimension D & E

Preliminary W78C52D- 2 -PIN CONFIGURATIONSVDD12345678910111213141516171819203940343536373830313233262728292122232425P0.0, AD0P0.1, AD1P0.2, AD2P0.3, A

Preliminary W78C52DPublication Release Date: December 1998- 3 - Revision A1PIN DESCRIPTIONP0.0−P0.7Port 0, Bits 0 through 7. Port 0 is a bidirectional

Preliminary W78C52D- 4 -PSENProgram Store Enable Output, active low. PSEN enables the external ROM onto the Port 0address/data bus during fetch and

Preliminary W78C52DPublication Release Date: December 1998- 5 - Revision A1FUNCTIONAL DESCRIPTIONThe W78C52D architecture consists of a core controlle

Preliminary W78C52D- 6 -deglitch the reset line when the W78C52D is used with an external RC network. The reset logic alsohas a special glitch removal

Preliminary W78C52DPublication Release Date: December 1998- 7 - Revision A12. PORT4Another bit-addressable port P4 is also available and only 4 bits (

Preliminary W78C52D- 8 -The time-out period is obtained using the following formula:12 1000 1214OSCPRESCALER×× × × mSBefore Watchdog time-out occurs,

Preliminary W78C52DPublication Release Date: December 1998- 9 - Revision A1ABSOLUTE MAXIMUM RATINGSPARAMETER SYMBOL MIN. MAX. UNITDC Power SupplyVCC−V