Rainbow-electronics AT73C502 Uživatelský manuál

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1
Features
Fulfills IEC 1036, Class 1 Accuracy Requirements
Fulfills IEC 687, Class 0.5 and Class 0.2 Accuracy, with External Temperature
Compensated Voltage Reference
Fulfills IEC 1268, Requirements for Reactive Power
Simultaneous Active, Reactive and Apparent Power and Energy Measurement
Power Factor, Frequency, Voltage and Current Measurement
Single- and Poly-phase Operation
Three Basic Operating Modes: Stand-alone Mode, Microprocessor Mode and Multi-
Channel Mode
Flexible Interfacing, 8-bit Microprocessor Interface, 8-bit Status Output and Eight
Impulse Outputs
Calibration of Gain and Phase Error
Compensation of the Non-linearity of Low Power Measurement
Adjustable Starting Current and Meter Constant
Measurement Bandwidth of 1000 Hz
Tamper-proof Design
Single +5V Supply
Description
A two chip solution, consisting of AT73C500 and AT73C501 (or AT73C502), offers all
main features required for the measurement and calculation of various power and
energy quantities in static Watt-hour meters. The devices operate according to
IEC1036, class 1, specification. IEC 687, class 0.5 and 0.2 requirements are fulfilled
when used with external temperature compensated voltage reference.
The AT73C501 contains six, high-performance, Sigma-Delta analog-to-digital convert-
ers (ADC). The AT73C500 is an efficient digital signal processor (DSP) that supports
interfacing both with the AT73C501 and with an external microprocessor. The
AT73C500 can also be used with the differential input ADC, AT73C502.
With this chipset, only a minimum of discrete components is required to develop prod-
ucts ranging from simple domestic Watt-hour meters to sophisticated industrial
meters. The chipset can be used in single-phase as well as in poly-phase systems.
The AT73C500 is easy to configure. By changing the mode of the AT73C500, the
device can be operated in a stand-alone environment or be used with a separate con-
trol processor. It is also possible to configure the circuit to perform the functions of
three independent single phase Wh meters.
The chips support calibration of gain and phase error. All calibrations are done in the
digital domain and no trimming components are needed. The calibration coefficients
are either stored in an EEPROM memory or supplied by an external microprocessor.
(continued)
Chipset
Solution for
Watt-hour
Meters
AT73C500 with
AT73C501 or
AT73C502
Rev. 1035B09/99
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Shrnutí obsahu

Strany 1 - Description

1Features• Fulfills IEC 1036, Class 1 Accuracy Requirements• Fulfills IEC 687, Class 0.5 and Class 0.2 Accuracy, with External Temperature Compensated

Strany 2

AT73C50010In multi-channel mode the active energy of each threemeters (phases) is stored in registers 12-14. REG15 is notin use.The maximum value of d

Strany 3

AT73C50011It is recommended that 50 Hz meters are operated from3.2768 MHz crystal. In 60 Hz system, a 3.93216 MHz clockis normally used. Because the c

Strany 4

AT73C50012Output OperationsThe data output by AT73C500 can be divided into threecategories: data to external processor, status informationand impulse

Strany 5

AT73C50013Table 2. Package 1Byte Data Order Meaning1 Sync LS Single byte Synchronization2 Sync MS Single byte Synchronization3 Mode Single byte Mode

Strany 6

AT73C50014The six data packages arrive as follows:Figure 9. Data transfer to processor in six packagesIn normal mode, the Sync LS byte indicates the

Strany 7

AT73C50015Content of Sync LS byte is described in the following table.Bits 3-7 of the Sync LS byte are not used.The Sync MS byte contains a unique 8-b

Strany 8

AT73C50016Figure 11. Contents of a data packageAT73C500 offers some time for the processor to analyzethe synchronization, status and mode information

Strany 9

AT73C50017Status InformationAT73C500 provides the following status informationthrough the Status bus of AT73C500 (B8 - B15, ADDR0).High level of Lx fl

Strany 10 - AT73C500

AT73C50018Impulse OutputsAT73C500 provides eight impulse outputs, four meter con-stant outputs and four pulse outputs to drive electrome-chanical disp

Strany 11

AT73C50019CalibrationThe calibration coefficients always have to be loaded intoAT73C500 registers after reset state. The coefficients areeither read f

Strany 12

AT73C5002Figure 1. Block diagram of the AT73C500 chipset in stand-alone configurationThe AT73C500 is programmed to measure active, reactiveand appare

Strany 13

AT73C50020The calibration data is transferred in the following sequence:The meaning of the calibration coefficient mnemonics are as follows:Byte Cali

Strany 14

AT73C50021AT73C500 provides four handshaking signals, ADDR1,RD/WR, STROBE and BRDY, for interfacing with themicroprocessor. Microprocessor can use the

Strany 15

AT73C50022scale values of the powers. The nominal full-scale valuesare:The valid range for the offset calibration factors is -128 to+127.The scale of

Strany 16

AT73C50023where ELSB is the energy value of one LSB in the energyregister, 0.4Wh in default conditions. When the meter isoperated in non-standard cond

Strany 17

AT73C50024Electrical CharacteristicsMeasurement AccuracyThe accuracy measurements are based on the usage ofthe AT73C500 DSP with the single-ended ADC,

Strany 18

AT73C50025The measurements are done according to IEC1036 specifi-cation. The results are averaged over a period of 10s.Before measurements, AT73C500 d

Strany 19

AT73C50026Table 13. Frequency Variation ErrorFrequency Current Voltage Power Factor Min Typ Max Units0.95fN...1.05fN0.1IBUN1.000 -0.2 +0.2 %0.95fN...

Strany 20

AT73C50027Starting CurrentAs default, the starting current is based on 5A basic currentand 80A full scale current range. Temperature CoefficientMeasur

Strany 21

AT73C50028Digital CharacteristicsVDD = 5V, VDA = 5VParameter Min Typ Max UnitsHigh-Level Input Voltage 4.0 VLow-Level Input Voltage 1.0 VHigh-Level Ou

Strany 22

AT73C50029Ordering InformationOrdering Code Package Operation RangeAT73C500-JC 44J Commercial(0°C to 70°C)AT73C501-JC 28J Commercial(0°C to 70°C)AT73C

Strany 23

AT73C5003Pin DescriptionAT73C501 Single-ended ADCFigure 3. PLCC-28 package pin layoutPower Supply Pins Pin I/O DescriptionVDDA 13 PWR Analog Supply,

Strany 24

AT73C50030Packaging Information.045(1.14) X 45°PIN NO. 1IDENTIFY.032(.813).026(.660).050(1.27) TYP.300(7.62) REF SQ.045(1.14) X 30° - 45°.022(.559) X

Strany 25

© Atmel Corporation 1999.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa

Strany 26

AT73C5004AT73C502 Differential-Ended ADCFigure 4. QFP-44 package pin layout Power Supply Pins Pin I/O DescriptionVDA12, 13, 29, 30PWRAnalog Supply, P

Strany 27

AT73C5005AT73C500 DSPFigure 5. PLCC-44 package pin layoutPower Supply Pins Pin I/O DescriptionVCC 35, 42 PWR Digital Supply, Positive, +5VGND1, 2, 6,

Strany 28

AT73C5006AT73C501 and AT73C502The AT73C501 consists of six, 16-bit analog-to-digital con-verters. The converters are equipped with single-endedinputs.

Strany 29

AT73C5007If the nominal voltage is chosen to be 120V, the voltagedivider can either have the same configuration as in the230V meter, or it can be modi

Strany 30 - JEDEC STANDARD MS-022 AB

AT73C5008Figure 8. Serial bus timingOperating Modes of AT73C500The AT73C500 chipset has six operating modes. Themode is selected by three mode contro

Strany 31 - 1035B–09/99/xM

AT73C5009Measurements and CalculationsThe first operation performed by AT73C500 is digital high-pass filtering. The purpose of the filtering is to rem

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