Rainbow-electronics DS2182A Uživatelský manuál

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Copyright 1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
DS2182A
T1 Line Monitor
DS218A
041995 1/22
FEATURES
Performs framing and monitoring functions
Supports Superframe and Extended Superframe
formats
Four onboard error counters
16-bit bipolar violation
8-bit CRC
8-bit OOF
8-bit frame bit error
Indication of the following
yellow and blue alarms
incoming B8ZS code words
8 and 16 zero strings
change of frame alignment
loss of sync
carrier loss
Simple serial interface used for configuration, control
and status monitoring
Burst mode allows quick access to counters for status
updates
Automatic counter reset feature
Single 5V supply; low-power CMOS technology
Available in 28-pin DIP and 28-pin PLCC
The DS2182A is upward-compatible from the original
DS2182
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
28-Pin DIP (600 MIL)
25
26
27
28
INT
SDI
SDO
CS
SCLK
NC
RYEL
RLINK
RLCLK
RCLK
RCHCLK
RSER
NC
VSS
VDD
RLOS
RFER
RBV
RCL
RNEG
RPOS
RST
TEST
RSIGSEL
RSIGFR
RABCD
RMSYNC
RFSYNC
The updated DS2182A includes the following changes
from the original DS2182:
ability to count excessive zeros
Severely Errored Framing Event indication
updated AIS detection
updated RCL detection
AIS and RCL alarm clear indications
DESCRIPTION
The DS2182A T1 Line Monitor Chip is a monolithic
CMOS device designed to monitor real-time perform-
ance on T1 lines. The DS2182A frames to the data on
the line, counts errors, and supplies detailed informa-
tion about the status and condition of the line. Large on-
board counters allow the accumulation of errors for ex-
tended periods, which permits a single CPU to monitor a
number of T1 lines. Output clocks that are synchronized
to the incoming data stream are provided for easy ex-
traction of S-Bits, FDL bits, signaling bits, and channel
data. The DS2182A meets the requirements of ANSI
T1.231.
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Shrnutí obsahu

Strany 1 - T1 Line Monitor

Copyright 1995 by Dallas Semiconductor Corporation.All Rights Reserved. For important information regardingpatents and other intellectual property r

Strany 2 - 041995 2/22

DS2182A041995 10/22RSR2: RECEIVE STATUS REGISTER 2 Figure 10(MSB) (LSB)SEFERCLC RBLC FERR FECS OOFCS CRCCS BPVCSSYMBOL POSITION NAME AND DESCRIPTIONS

Strany 3 - PIN DESCRIPTION Table 1

DS2182A041995 11/22CRCCS RIMR2.1 CRC Count Saturation Mask. 1 = interrupt enabled 0 = interrupt maskedBPVCS RIMR2.0 Bipolar Violation Count Saturation

Strany 4 - REGISTER SUMMARY Table 4

DS2182A041995 12/22SYNC CRITERIA (RCR1.3)193E. Bit RCR1.3 determines which sync algorithm isutilized when resync is in progress (RLOS = 1). In 193E

Strany 5 - 041995 5/22

DS2182A041995 13/22RCR2: RECEIVE CONTROL REGISTER 2 Figure 13(MSB) (LSB)– – BVCRF FM SFYEL B8ZS – –SYMBOL POSITION NAME AND DESCRIPTION- RCR2.7 Reser

Strany 6 - 041995 6/22

DS2182A041995 14/22193E RECEIVE MULTIFRAME TIMING Figure 151 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17FRAME#RFSYNCRMSYNCRSIGSELRSIGFRRLCLKRABCDRLINKDA

Strany 7 - 041995 7/22

DS2182A041995 15/22RECEIVE MULTIFRAME BOUNDARY TIMING Figure 16RCLKRPOS,RNEGRFSYNCRMSYNCRSIGSELRLCLKRCHCLKRLINKRABCDRSERRSIGFRCHANNEL 1LSB MSBFCHANNE

Strany 8 - YELLOW ALARM

DS2182A041995 16/22RBV OUTPUTThe bipolar violation output transitions high when theaccused bit emerges at RSER. RBV goes low at thenext bit time if n

Strany 9 - 041995 9/22

DS2182A041995 17/22ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground -1.0V to 7.0VOperating Temperature 0°C to +70°CStorage Temperature -

Strany 10 - 041995 10/22

DS2182A041995 18/22CHARACTERISTICS1,2 SERIAL PORT (0°C to 70°C; VDD = 5V + 10%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESSDI to SCLK Setup tDC50 nsSCL

Strany 11 - SYNCHRONIZER

DS2182A041995 19/22SERIAL PORT WRITE AC TIMING DIAGRAM Figure 18tCCSCLKCStSCCtCHtFtRtCWHtCCHMSBLSB1LSBtDCtCDHtCLtCDtCDHCONTROL BYTE DATA BYTESDINOTES

Strany 12 - 041995 12/22

DS2182A041995 2/22DS2182A BLOCK DIAGRAM Figure 1SERIALPORTINTERFACEINFORMATION REGISTERSYELLOWALARMDETECTRECEIVESYNCCONTROLLERBIPOLARDECODERDATADEMUX

Strany 13 - 041995 13/22

DS2182A041995 20/22RECEIVE AC TIMING DIAGRAM Figure 20RSTRCLKRSER, RABCD,RLINKRMSYNC, RFSYNCRSIGSEL, RSIGFRRLCLK, RCHCLKRYEL, RCL, RBVRFER, RLOSRPOS,

Strany 14 - 041995 14/22

DS2182A041995 21/22DS2182A T1 LINE MONITOR 28-PIN DIPA128 1514BDHJFECGK13 EQUAL SPACES AT + .010TNAINCHESDIM MIN MAXA 1.445 1.470B 0.530 0.550C 0.140

Strany 15 - RYEL OUTPUT

DS2182A041995 22/22DS2182AQ T1 LINE MONITOR 28-PIN PLCCCH1N1 E E1 D1 D D2 E2e1CA1A2 ABL1B1INCHESDIM MIN MAXA 0.165 0.180A1 0.090 0.120A2 0.020 -B 0.

Strany 16 - RFER OUTPUT

DS2182A041995 3/22PIN DESCRIPTION Table 1PIN SYMBOL TYPE DESCRIPTION6 NC – No Connect. No internal connection. This pin can be tied to either VSSor

Strany 17 - 041995 17/22

DS2182A041995 4/22PORT PIN DESCRIPTION Table 2PIN SYMBOL TYPE DESCRIPTION1 INT O Receive Alarm Interrupt. Flags host controller during alarm conditi

Strany 18 - 041995 18/22

DS2182A041995 5/22SERIAL PORT INTERFACEThe port pins of the DS2182A serve as a microproces-sor/microcontroller-compatible serial port. Eleven on-boar

Strany 19 - AC TIMING DIAGRAM Figure 19

DS2182A041995 6/22SERIAL PORT READ/WRITE Figure 3CSSCLKSDISDOR/W A0 A1 A2 A3 0 0 BM D0 D1 D2 D3 D4 D5 D6 D7ADDRESS/COMMAND DATA INPUT/OUTPUTNOTES:1.

Strany 20 - 041995 20/22

DS2182A041995 7/22CRCCR: CRC COUNT REGISTER Figure 5(MSB) (LSB)CRC7 CRC6 CRC5 CRC4 CRC3 CRC2 CRC1 CRC0SYMBOL POSITION NAME AND DESCRIPTIONCRC7 CRCCR.7

Strany 21

DS2182A041995 8/22RSR1: RECEIVE STATUS REGISTER 1 Figure 8(MSB) (LSB)8ZD 16ZD RCL RYEL RLOS B8ZSD RBL COFASYMBOL POSITION NAME AND DESCRIPTION8ZD RSR

Strany 22

DS2182A041995 9/22RIMR1: RECEIVE INTERRUPT MASK REGISTER 1 Figure 9(MSB) (LSB)8ZD 16ZD RCL RYEL RLOS B8ZSD RBL COFASYMBOL POSITION NAME AND DESCRIPTI

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