Rainbow-electronics DS1215 Uživatelský manuál

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Copyright 1997 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
DS1215
Phantom Time Chip
DS1215
032697 1/15
FEATURES
Keeps track of hundredths of seconds, seconds, min-
utes, hours, days, date of the month, months, and
years
Adjusts for months with fewer than 31 days
Leap year automatically corrected up to 2100
No address space required
Provides nonvolatile controller functions for battery
backup of RAM
Supports redundant batteries for high–reliability
applications
Uses a 32.768 KHz watch crystal
Full ±10% operating range
Operating temperature range 0°C to 70°C
Space-saving, 16–pin DIP package and SOIC
Optional industrial temperature range –40°C to +85°C
(IND)
DESCRIPTION
The DS1215 Phantom Time Chip is a combination of a
CMOS timekeeper and a nonvolatile memory controller.
In the absence of power, an external battery maintains
the timekeeping operation and provides power for a
CMOS static RAM. The watch keeps track of hun-
dredths of seconds, seconds, minutes, hours, day, date,
month, and year information. The last day of the month
is automatically adjusted for months with less than 31
days, including correction for leap year every four years.
The watch operates in one of two formats: a 12–hour
mode with an AM/PM indicator or a 24–hour mode. The
nonvolatile controller supplies all the necessary support
circuitry to convert a CMOS RAM to a nonvolatile
memory. The DS1215 can be interfaced with either
RAM or ROM without leaving gaps in memory.
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
X1
X2
WE
BAT1
GND
D
Q
GND
V
CCI
V
CCO
BAT2
RST
OE
CEI
CEO
ROM/RAM
16–PIN DIP (300 MIL)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
X1
X2
WE
BAT1
GND
D
Q
GND
V
CCI
V
CCO
BAT2
RST
OE
CEI
CEO
ROM/RAM
16–PIN SOIC (300 MIL)
PIN DESCRIPTION
X1, X2 32.768 KHz Crystal Connections
WE Write Enable
BAT1 Battery 1 Input
GND Ground
D Data In
Q Data Out
ROM/RAM
ROM/RAM Select
CEO
Chip Enable Out
CEI Chip Enable Input
OE Output Enable
RST Reset
BAT2 Battery 2 Input
V
CCO
Switched Supply Output
V
CCI
+5 VDC Input
NOTE: Both pins 5 and 8 must be grounded.
ORDERING INFORMATION
DS1215 16–pin DIP
DS1215S 16–pin SOIC
DS1215N 16–pin DIP (IND)
DS1215SN 16–pin SOIC (IND)
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Shrnutí obsahu

Strany 1 - Phantom Time Chip

Copyright 1997 by Dallas Semiconductor Corporation.All Rights Reserved. For important information regardingpatents and other intellectual property r

Strany 2 - TIMING BLOCK DIAGRAM Figure 1

DS1215032697 10/15TIMING DIAGRAM: READ CYCLE TO TIME CHIP ROM/RAM = GNDCEIOEQWE = VIHOUTPUT DATA VALID tRC tOD tRR tCO tOE tCOE tODOtOEETIMING DIAGRA

Strany 3

DS1215032697 11/15TIMING DIAGRAM: READ CYCLE ROM/RAM = VCCOOUTPUT DATA VALID tRC tCO tRR tOD tRR tRC tOE tAS tAS tOEE tCOE tODO tAH tAHCEIOEWEQTIMING

Strany 4 - AM–PM/12/24 MODE

DS1215032697 12/15TIMING DIAGRAM: POWER DOWN tCE tPD tCEtPFVBAT - 0.2VVIHVILVILVIH4.5V3VtFCEICEOCEOVCCIROM/RAM = GNDROM/RAM = VCCOTIMING DIAGRAM: PO

Strany 5

DS1215032697 13/15NOTES:1. All voltages are referenced to ground.2. Measured with load shown in Figure 6.3. Input pulse rise and fall times equal 10 n

Strany 6

DS1215032697 14/15DS1215 TIME CHIP1CAB DHJKGEFDIM MIN MAX16–PINPKGA IN. 0.740 0.780MMB IN. 0.240 0.260MMC IN. 0.120 0.140MMD IN. 0.300 0.325MME I

Strany 7 - °C to 70°C; V

DS1215032697 15/15DS1215S SERIAL TIMEKEEPER 16–PIN SOICAFCEphiJGKLHB1PKG16–PINDIM MIN MAXA IN.MM0.40210.210.41210.46B IN.MM0.2907.370.3007.65C IN.MM0.

Strany 8

DS1215032697 2/15OPERATIONThe block diagram of Figure 1 illustrates the main ele-ments of the Time Chip. Communication with the TimeChip is establish

Strany 9

DS1215032697 3/15When the first write cycle is executed, it is compared tobit 1 of the 64–bit comparison register. If a match isfound, the pointer in

Strany 10

DS1215032697 4/15NONVOLATILE CONTROLLER OPERATIONThe operation of the nonvolatile controller circuits withinthe Time Chip is determined by the level o

Strany 11

DS1215032697 5/15RAM/TIME CHIP INTERFACE Figure 3CMOS STATIC RAMADDDATA I/OWEOECEDS1215CEOOEWECEIRSTBAT1X1BAT2X2VCCODQVCCIROM/RAM++BAT1BAT232.768 KHz4

Strany 12 - TIMING DIAGRAM: POWER UP

DS1215032697 6/15TIME CHIP REGISTER DEFINITION Figure 57654 32100.1 SEC00–9900–5900–5901–1201–0701–3101–1200–9901234567RANGE(BCD)REGISTER0012/24 010HR

Strany 13 - OUTPUT LOAD Figure 6

DS1215032697 7/15ABSOLUTE MAXIMUM RATINGS*Voltage on any Pin Relative to Ground –0.3V to +7.0V Operating Temperature 0°C to 70°C Storage Temperature –

Strany 14 - DS1215 TIME CHIP

DS1215032697 8/15AC ELECTRICAL CHARACTERISTICS ROM/RAM = GND (0°C to 70°C; VCC = 4.5 to 5.5V)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESRead Cycle Time

Strany 15 - 032697 15/15

DS1215032697 9/15AC ELECTRICAL CHARACTERISTICS ROM/RAM = VCCO (0°C to 70°C; VCC = 5V ± 10%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESRead Cycle Time tR

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