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Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS134210of a match with date of the month. If DY/DT is written to 1, the alarm is the result of a mat
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS134211Control/Status Register (0Fh)Bit 7: Oscillator Stop Flag (OSF). If the OSF bit is a 1, that i
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS134212 I2C Serial Port OperationI2C Slave AddressThe DS1341/DS1342s’ slave address
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS134213DS1341/DS1342s’ slave address is D0h and cannot be modified by the user. When the R/W bit
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS1342Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embod
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13422Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13423AC ELECTRICAL CHARACTERISTICS(VCC = +1.8V to +5.5V, TA = -40NC to +85NC, unless otherwise note
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13424Note 11: CB is the total capacitance of one bus line, including all connected devices, in pF.
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13425 Funct
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13426 Detailed DescriptionThe DS1341/DS1342 low-current RTCs are timekeeping de
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13427External SynchronizationWhen an external clock reference is used, the input from CLKI
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13428Register MapTable 1 shows the map for the DS1341/DS1342 regis-ters. During a multib
Low-Current I2C RTCs for High-ESR CrystalsDS1341/DS13429known state by holding SCL low for tTIMEOUT. Doing so limits the minimum frequency at which th
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