Rainbow-electronics ATtiny43U Uživatelský manuál stáhnout pdf (Strana 34)

8048B–AVR–03/09

ATtiny43U

7.4.6 Port Pins

When entering a sleep mode, all port pins should be configured to use minimum power. The

most important thing is then to ensure that no pins drive resistive loads. In sleep modes where

both the I/O clock (clk

I/O

) and the ADC clock (clk

ADC

) are stopped, the input buffers of the device

will be disabled. This ensures that no power is consumed by the input logic when not needed. In

some cases, the input logic is needed for detecting wake-up conditions, and it will then be

enabled. See the section “Digital Input Enable and Sleep Modes” on page 66 for details on

which pins are enabled. If the input buffer is enabled and the input signal is left floating or has an

analog signal level close to V

/2, the input buffer will use excessive power.

For analog input pins, the digital input buffer should be disabled at all times. An analog signal

level close to V

/2 on an input pin can cause significant current even in active mode. Digital

input buffers can be disabled by writing to the Digital Input Disable Register (DIDR0). See

“DIDR0 – Digital Input Disable Register 0” on page 130 for details.

7.5 Register Description

7.5.1 MCUCR – MCU Control Register

The MCU Control Register contains control bits for power management.

• Bit 7 – BODS: BOD Sleep

The BODS bit must be written to logic one in order to turn off BOD during sleep, see Table 7-1

on page 31. Writing to the BODS bit is controlled by a timed sequence and an enable bit,

BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first

be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be set to

zero within four clock cycles.

The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed

while BODS is active in order to turn off the BOD for the actual sleep mode. The BODS bit is

automatically cleared after three clock cycles.

• Bit 5 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

• Bits 4, 3 – SM[1:0]: Sleep Mode Select Bits 2:0

These bits select between the three available sleep modes as shown in Table 7-2 below.

Bit 76543210

0x35 (0x55) BODS

PUD SE SM1 SM0 BODSE ISC01 ISC00 MCUCR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value00000000

Table 7-2. Sleep Mode Select

SM1 SM0 Sleep Mode

00Idle

1 2 ... 29 30 31 32 33 34 35 36 37 38 39 ... 181 182

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