Rainbow-electronics ADC10080 Uživatelský manuál stáhnout pdf

ADC10080

10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter

General Description

The ADC10080 is a monolithic CMOS analog-to-digital con-

verter capable of converting analog input signals into 10-bit

digital words at 80 Megasamples per second (MSPS). This

converter uses a differential, pipeline architecture with digital

error correction and an on-chip sample-and-hold circuit to

provide a complete conversion solution, and to minimize

power consumption, while providing excellent dynamic per-

formance. A unique sample-and-hold stage yields a full-

power bandwidth of 400 MHz. Operating on a single 3.0V

power supply, this device consumes just 78.6 mW at

80 MSPS, including the reference current. The Standby

feature reduces power consumption to just 15 mW.

The differential inputs provide a full scale selectable input

swing of 2.0 V

P-P

, 1.5 V

P-P

, 1.0 V

P-P

, with the possibility of a

single-ended input. Full use of the differential input is recom-

mended for optimum performance. An internal +1.2V preci-

sion bandgap reference is used to set the ADC full-scale

range, and also allows the user to supply a buffered refer-

enced voltage for those applications requiring increased ac-

curacy. The output data format is 10-bit offset binary, or two’s

complement.

This device is available in the 28-lead TSSOP package and

will operate over the industrial temperature range of −40˚C to

+85˚C.

Features

n Single +3.0V operation

n Selectable 2.0 V

P-P

, 1.5 V

P-P

, or 1.0 V

P-P

full-scale input

swing

n 400 MHz −3 dB input bandwidth

n Low power consumption

n Standby mode

n On-chip reference and sample-and-hold amplifier

n Offset binary or two’s complement data format

n Separate adjustable output driver supply to

accommodate 2.5V and 3.3V logic families

n 28-pin TSSOP package

Key Specifications

n Resolution 10 Bits

n Conversion Rate 80 MSPS

n Full Power Bandwidth 400 MHz

n DNL

0.25 LSB (typ)

n SNR (f

= 10 MHz) 59.5 dB (typ)

n SFDR (f

= 10 MHz) −78.7 dB (typ)

n Data Latency 6 Clock Cycles

n Supply Voltage +3.0V

n Power Consumption, 80 MHz 78.6 mW

Applications

n Ultrasound and Imaging

n Instrumentation

n Cellular Based Stations/Communications Receivers

n Sonar/Radar

n xDSL

n Wireless Local Loops

n Data Acquisition Systems

n DSP Front Ends

Connection Diagram

20048501

November 2004

ADC10080 10-Bit 80 MSPS 3V, 78.6 mW A/D Converter

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Shrnutí obsahu

Strany 1 - ADC10080

ADC1008010-Bit, 80 MSPS, 3V, 78.6 mW A/D ConverterGeneral DescriptionThe ADC10080 is a monolithic CMOS analog-to-digital con-verter capable of convert

Strany 2 - Block Diagram