20
8127B–AVR–08/09
6.4 Starting
6.4.1 Starting from Reset
The internal reset is immediately asserted when a reset source goes active. The internal reset is
kept asserted until the reset source is released and the start-up sequence is completed. The
start-up sequence includes three steps, as follows.
1. The first step after the reset source has been released consists of the device counting
the reset start-up time. The purpose of this reset start-up time is to ensure that supply
voltage has reached sufficient levels. The reset start-up time is counted using the inter-
nal 128 kHz oscillator. See Table 6-1 for details of reset start-up time.
Note that the actual supply voltage is not monitored by the start-up logic. The device
will count until the reset start-up time has elapsed even if the device has reached suffi-
cient supply voltage levels earlier.
2. The second step is to count the oscillator start-up time, which ensures that the cali-
brated internal oscillator has reached a stable state before it is used by the other parts
of the system. The calibrated internal oscillator needs to oscillate for a minimum num-
ber of cycles before it can be considered stable. See Table 6-1 for details of the
oscillator start-up time.
3. The last step before releasing the internal reset is to load the calibration and the config-
uration values from the Non-Volatile Memory to configure the device properly. The
configuration time is listed in Table 6-1.
Notes: 1. After powering up the device or after a reset the system clock is automatically set to calibrated
internal 8 MHz oscillator, divided by 8
6.4.2 Starting from Power-Down Mode
When waking up from Power-Down sleep mode, the supply voltage is assumed to be at a suffi-
cient level and only the oscillator start-up time is counted to ensure the stable operation of the
oscillator. The oscillator start-up time is counted on the selected main clock, and the start-up
time depends on the clock selected. See Table 6-2 for details.
Notes: 1. The start-up time is measured in main clock oscillator cycles.
6.4.3 Starting from Idle / ADC Noise Reduction / Standby Mode
When waking up from Idle, ADC Noise Reduction or Standby Mode, the oscillator is already run-
ning and no oscillator start-up time is introduced.
The ADC is available in ATtiny5/10, only.
Table 6-1. Start-up Times when Using the Internal Calibrated Oscillator
Reset Oscillator Configuration Total start-up time
64 ms 6 cycles 21 cycles 64 ms + 6 oscillator cycles + 21 system clock cycles
(1)
Table 6-2. Start-up Time from Power-Down Sleep Mode.
Oscillator start-up time Total start-up time
6 cycles 6 oscillator cycles
(1)
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