Rainbow-electronics W90P710CDG Uživatelský manuál stáhnout pdf (Strana 454)

W90P710CD/W90P710CDG

BITS DESCRIPTIONS

PSCK Frequency Selection bit 2, 1 and 0.

This selection can adjust power-on /power-offf sequence interval.

They select working clock frequency as following table. Default values

SCKFS0, SCKFS1,

110 1.25 MHz

SCCLK Frequency Selection bit 2, 1 and 0.

They select working clock frequency as following table. Default values

SCKFS0, SCKFS1,

110 1.25 MHz

Clock Stop voltage Level

0 = SCCLK stops at low if CLKSTP is also set to "0".

1 = SCCLK stops at high if CLKSTP is also set to "1".

Clock Stop control bit

Setting "1" to this bit stops SCCLK at a voltage level specified by

CLKSTPL (bit 3 of ECR).

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Rainbow-electronics W90P710CDG Uživatelský manuál Strana 454