Rainbow-electronics AT25640 Uživatelský manuál

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1
Features
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
Medium-voltage and Standard-voltage Operation
5.0 (V
CC
= 4.5V to 5.5V)
2.7 (V
CC
= 2.7V to 5.5V)
3.0 MHz Clock Rate (5V)
32-byte Page Mode
Block Write Protection
Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for
both Hardware and Software Data Protection
Self-timed Write Cycle (5 ms Typical)
High-reliability
Endurance: One Million Write Cycles
Data Retention: 100 Years
8-lead PDIP and 8-lead JEDEC SOIC Packages
Description
The AT25080/160/320/640 provides 8192/16384/32768/65536 bits of serial electri-
cally-erasable programmable read only memory (EEPROM) organized as
1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many
automotive applications where low-power and low-voltage operation are essential.
The AT25080/160/320/640 is available in space saving 8-lead PDIP and 8-lead
JEDEC SOIC packages.
The AT25080/160/320/640 is enabled through the Chip Select pin (CS
) and accessed
via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and
Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-
rate ERASE cycle is required before WRITE.
BLOCK WRITE protection is enabled by programming the status register with one of
four blocks of write protection. Separate program enable and program disable instruc-
tions are provided for additional data protection. Hardware data protection is provided
via the WP
pin to protect against inadvertent write attempts to the status register. The
HOLD
pin may be used to suspend any serial communication without resetting the
serial sequence.
SPI Serial
Automotive
EEPROMs
8K (1024 x 8)
16K (2048 x 8)
32K (4096 x 8)
64K (8192 x 8)
AT25080
AT25160
AT25320
AT25640
3260D–SEEPR–9/03
Pin Configuration
Pin Name Function
CS
Chip Select
SCK Serial Data Clock
SI Serial Data Input
SO Serial Data Output
GND Ground
VCC Power Supply
WP
Write Protect
HOLD
Suspends Serial Input
NC No Connect
DC Don’t Connect
8-lead PDIP
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
8-lead SOIC
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
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Shrnutí obsahu

Strany 1 - Pin Configuration

1Features• Serial Peripheral Interface (SPI) Compatible• Supports SPI Modes 0 (0,0) and 3 (1,1)• Medium-voltage and Standard-voltage Operation– 5.0 (V

Strany 2

10AT25080/160/320/6403260D–SEEPR–9/03Timing DiagramsSynchronous Data Timing (for Mode 0) WREN Timing WRDI Timing SOVOHVOLHI-ZHI-ZtVVALID INSIVIHVIL

Strany 3

11AT25080/160/320/6403260D–SEEPR–9/03RDSR Timing WRSR Timing CSSCK01234567891011121314SIINSTRUCTIONSO76543210DATA OUTMSBHIGH IMPEDANCE15HIGH IMPEDAN

Strany 4

12AT25080/160/320/6403260D–SEEPR–9/03READ Timing WRITE Timing HOLD Timing CSSCKSISO000111222333...44556677891015 14 1311 20 21 22 23 24 25 26 27 28

Strany 5

13AT25080/160/320/6403260D–SEEPR–9/03 AT25080 Ordering InformationOrdering Code Package Operation RangeAT25080-10PA-5.0CAT25080N-10SA-5.0C8P38S1Automo

Strany 6

14AT25080/160/320/6403260D–SEEPR–9/03AT25160 Ordering InformationOrdering Code Package Operation RangeAT25160-10PA-5.0CAT25160N-10SA-5.0C8P38S1Automot

Strany 7

15AT25080/160/320/6403260D–SEEPR–9/03AT25320 Ordering InformationOrdering Code Package Operation RangeAT25320-10PA-5.0CAT25320N-10SA-5.0C8P38S1Automot

Strany 8

16AT25080/160/320/6403260D–SEEPR–9/03AT25640 Ordering InformationOrdering Code Package Operation RangeAT25640-10PA-5.0CAT25640N-10SA-5.0C8P38S1Automot

Strany 9

17AT25080/160/320/6403260D–SEEPR–9/03Packaging Information8P3 – PDIP 2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8P3, 8-lead, 0.300&

Strany 10 - AT25080/160/320/640

18AT25080/160/320/6403260D–SEEPR–9/038S1 – JEDEC SOIC 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. Note:10/10/018S1, 8-lead (0.15

Strany 11

Printed on recycled paper.3260D–SEEPR–9/03 xMDisclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly

Strany 12

2AT25080/160/320/6403260D–SEEPR–9/03 Block Diagram Absolute Maximum Ratings*Operating Temperature... -55°C to +125°C*N

Strany 13

3AT25080/160/320/6403260D–SEEPR–9/03Pin Capacitance(1) Note: 1. This parameter is characterized and is not 100% tested.DC Characteristics(1) Note: 1

Strany 14

4AT25080/160/320/6403260D–SEEPR–9/03Note: 1. This parameter is characterized and is not 100% tested. AC Characteristics Applicable over recommended op

Strany 15

5AT25080/160/320/6403260D–SEEPR–9/03Serial Interface DescriptionMASTER: The device that generates the serial clock.SLAVE: Because the Serial Clock pin

Strany 16

6AT25080/160/320/6403260D–SEEPR–9/03SPI Serial Interface

Strany 17

7AT25080/160/320/6403260D–SEEPR–9/03Functional DescriptionThe AT25080/160/320/640 is designed to interface directly with the synchronous serial periph

Strany 18

8AT25080/160/320/6403260D–SEEPR–9/03WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one offour levels of protection. The

Strany 19 - Regional Headquarters

9AT25080/160/320/6403260D–SEEPR–9/03READ SEQUENCE (READ): Reading the AT25080/160/320/640 via the SO (Serial Output)pin requires the following sequenc

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