
Copyright 1995 by Dallas Semiconductor Corporation.All Rights Reserved. For important information regardingpatents and other intellectual property r
DS2181A041995 10/32RCR: RECEIVE CONTROL REGISTER Figure 6(MSB) (LSB)– – RSM CMSC CMRC FRC SYNCE RESYNCSYMBOL POSITION NAME AND DESCRIPTION– RCR.7 Res
DS2181A041995 11/32CCS SIGNALLINGCCS (selected when TCR.5 = 1 and/or when RCR.1 = 1)utilizes all bit positions of timeslot 16 in every frame formessa
DS2181A041995 12/32TSD INPUT TIMING (TCR.6 = 1; TCR.5 = 0) Table 6FRAME # TIMESLOT SIGNALLINGDATA SAMPLED AT TSD0 171 1,182 2,193 3,204 4,215 5,226
DS2181A041995 13/32CAS OUTPUT FORMAT IN TIMESLOT 16 Figure 8Frame 01Frame 1 Frame 150000XYXXABCD fortimeslot 1ABCD fortimeslot 17ABCD fortimeslot 15
DS2181A041995 14/32TXR: TRANSMIT EXTRA REGISTER Figure 10(MSB) (LSB)– – – – XB1 TDMA XB2 XB3SYMBOL POSITION NAME AND DESCRIPTION– TXR.7 Reserved; mus
DS2181A041995 15/32TRANSMIT TIMINGA low-high transition at TMSYNC once per multiframe(every 2 milliseconds) or at a multiple of the multiframerate es
DS2181A041995 16/32TRANSMIT MULTIFRAME BOUNDARY TIMING Figure 13TIMESLOT 30TCLKTMSYNC1,TFSYNCTMO1TCHCLKTAF2TSERTPOS3TNEGTIMESLOT 31 TIMESLOT 0FRAME
DS2181A041995 17/32TRANSMIT SIGNALLING TIMESLOT TIMING Figure 14TCLKTCHCLKTSTSTIMESLOT 15 TIMESLOT 16 TIMESLOT 17RECEIVE SIGNALLINGReceive signallin
DS2181A041995 18/32RECEIVE MULTIFRAME TIMING Figure 15DATA VALIDFOR TIMESLOT 1RCLKRCHCLKRSDAB DCFRAME 2TIMESLOT 1 TIMESLOT 18DATA VALIDFOR TIMESLOT
DS2181A041995 19/32RECEIVE MULTIFRAME BOUNDARY TIMING Figure 17RNEG,RPOSLSB MSBLSB MSBLSB MSBTIMESLOT 0FRAME 0FRAME 15FRAME 0LSB MSBTIMESLOT 1RCLKMS
DS2181A041995 2/32The hardware mode is intended for preliminary systemprototyping and/or retrofitting into existing systems.This mode requires no hos
DS2181A041995 20/32RSR: RECEIVE STATUS REGISTER Figure 18(MSB) (LSB)RRA RDMA RSA1 RUA1 FSERR MFSERR RLOS ECSSYMBOL POSITION NAME AND DESCRIPTIONRRA R
DS2181A041995 21/32RIMR: RECEIVE INTERRUPT MASK REGISTER Figure 19(MSB) (LSB)RRA RDMA RSA1 RUA1 FSERR MFSERR RLOS ECSSYMBOL POSITION NAME AND DESCRIP
DS2181A041995 22/32BVCR: BIPOLAR VIOLATION COUNT REGISTER Figure 20(MSB) (LSB)BVD7 BVD6 BVD5 BVD4 BVD3 BVD2 BVD1 BVD0SYMBOL POSITION NAME AND DESCRIP
RCLKRCHCLKRSTSRFER1DS2181A041995 23/32RRAThe remote alarm output transitions high when a remotealarm is detected. A high-low transition indicates the
RCLKRCHCLKRFSYNCRAFRCSYNCRFER4DS2181A041995 24/32CRC4 SUB-MULTIFRAME 2 ERRORED Figure 25RCLKRCHCLKRFSYNCRAFRCSYNCRFER2FRAME ALIGNMENT WORD ERRORED
DS2181A041995 25/32NOTES FOR FIGURES 23 THROUGH 27:1. CAS multiframe alignment word received in error; RFER will transition high at first error occur
DS2181A041995 26/32ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground -1.0V to 7.0VOperating Temperature 0°C to +70°CStorage Temperature
DS2181A041995 27/32SERIAL PORT WRITE AC TIMING DIAGRAM Figure 28tCWHtCCtCHtRtFtCLtCCHtCDHtDCSCLKCSSDINOTE:1. Shaded regions indicate “don’t care” st
DS2181A041995 28/32AC ELECTRICAL CHARACTERISTICS1,2 SERIAL PORT (0°C to 70°C, VDD = 5V + 5%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESSDI to SCLK Setup
DS2181A041995 29/32AC ELECTRICAL CHARACTERISTICS1,2 RECEIVE (0°C to 70°C, VDD = 5V + 5%)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESPropagation Delay RCL
DS2181A041995 3/32TRANSMIT PIN DESCRIPTION (40–PIN DIP ONLY) Table 1PIN SYMBOL TYPE DESCRIPTION1 TMSYNC I Transmit Multiframe Sync. Low-high transit
RCL,RBV,RLOS,RDMA,RRA,RFERtWHtPtWLtFtRRCLKRSER, RSDRMSYNC,RFSYNC,RCSYNC,RAF,RSTS,RCHCLKRSTRPOS, RNEGtPRDtRSTtSRDtHRDtPRAtPRSDS2181A041995 30/32TRANSM
DS2181A041995 31/32DS2181A CEPT TRANSCEIVER (600 MIL DIP) 40–PINBDACKG HJEF1NINCHESDIM MIN MAXA 2.050 2.075B 0.530 0.550C 0.140 0.160D 0.600 0.625E 0
DS2181A041995 32/32DS2181AQ CEPT TRANSCEIVER (PLCC)CA1A2 ABB1.075 MAXN1.150MAXNOTE 1D1DCH1EE1e1E2D2NOTE1: PIN 1 IDENTIFIER TO BE LOCATED IN ZONE IND
DS2181A041995 4/32RECEIVE PIN DESCRIPTION (40–PIN DIP ONLY) Table 2BPIN SYMBOL TYPE DESCRIPTION21 RRA O Receive Remote Alarm. Transitions high when
DS2181A041995 5/32POWER AND TEST PIN DESCRIPTION (40–PIN DIP ONLY) Table 4PIN SYMBOL TYPE DESCRIPTION20 VSS– Signal Ground. 0.0 volts.32 TEST I Test
DS2181A041995 6/32SERIAL PORT INTERFACEPins 14 through 18 of the DS2181A serve as a micropro-cessor/microcontroller-compatible serial port. Fourteeno
DS2181A041995 7/32ACB: ADDRESS COMMAND BYTE Figure 2(MSB) (LSB)BM – – ADD3 ADD2 ADD1 ADD0 R/WSYMBOL POSITION NAME AND DESCRIPTIONBM ACB.7 Burst Mode
DS2181A041995 8/32TCR: TRANSMIT CONTROL REGISTER Figure 4(MSB) (LSB)TUA1 TSS TSM INBS NBS XBS TSA1 ODMSYMBOL POSITION NAME AND DESCRIPTIONTUA1 TCR.7
DS2181A041995 9/32CCR: COMMON CONTROL REGISTER Figure 5(MSB) (LSB)– TAFP THDE RHDE TCE RCE SAS LLBSYMBOL POSITION NAME AND DESCRIPTION– CCR.7 Reserve
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