Rainbow-electronics AT89C5132 Uživatelský manuál stáhnout pdf (Strana 103)

103

AT8xC5132

4173A–8051–08/02

Table 101. MMDAT Register

MMDAT (S:DCh) – MMC Data Register

Reset Value = 1111 1111b

Table 102. MMCLK Register

MMCLK (S:EDh) – MMC Clock Divider Register

Reset Value = 0000 0000b

76543210

MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0

Bit

Number

Bit

Mnemonic Description

7 - 0 MD7:0

MMC Data Byte

Input (write) or output (read) register of the data FIFO.

76543210

MMCD7 MMCD6 MMCD5 MMCD4 MMCD3 MMCD2 MMCD1 MMCD0

Bit

Number

Bit

Mnemonic Description

7 - 0 MMCD7:0

MMC Clock Divider

8-bit divider for MMC clock generation.

1 2 ... 98 99 100 101 102 103 104 105 106 107 108 ... 161 162

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