
45
AT8xC5132
4173A–8051–08/02
Table 55. IPL1 Register
IPL1 (S:B2h) – Interrupt Priority Low Register 1
Reset Value = 0000 0000b
76543210
- IPLUSB - IPLKB IPLADC IPLSPI IPLI2C IPLMMC
Bit
Number
Bit
Mnemonic Description
7-
Reserved
The values read from this bit is always 0. Do not set this bit.
6IPLUSB
USB Interrupt Priority Level LSB
Refer to Table 48 for priority level description.
5-
Reserved
The values read from this bit is always 0. Do not set this bit.
4IPLKB
Keyboard Interrupt Priority Level LSB
Refer to Table 48 for priority level description.
3IPLADC
A-to-D Converter Interrupt Priority Level LSB
Refer to Table 48 for priority level description.
2IPLSPI
SPI Interrupt Priority Level LSB
Refer to Table 48 for priority level description.
1IPLI2C
Reserved
The values read from this bit is always 0. Do not set this bit.
0IPLMMC
MMC Interrupt Priority Level LSB
Refer to Table 48 for priority level description.
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