Rainbow-electronics ATmega128L Uživatelský manuál stáhnout pdf (Strana 144)

144

ATmega128(L)

2467B–09/01

compare (FOC2) strobe bits in normal mode. The OC2 register keeps its value even

when changing between waveform generation modes.

Be aware that the COM21:0 bits are not double buffered together with the compare

value. Changing the COM21:0 bits will take effect immediately.

Compare Match Output

Unit

The compare output mode (COM21:0) bits have two functions. The waveform generator

uses the COM21:0 bits for defining the output compare (OC2) state at the next compare

match. Also, the COM21:0 bits control the OC2 pin output source.

Figure 63 shows a

simplified schematic of the logic affected by the COM21:0 bit setting. The I/O registers,

I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O

port control registers (DDR and PORT) that are affected by the COM21:0 bits are

shown. When referring to the OC2 state, the reference is for the internal OC2 register,

not the OC2 pin. If a system reset occur, the OC2 register is reset to “0”.

Figure 63. Compare Match Output Unit, Schematic

The general I/O port function is overridden by the output compare (OC2) from the wave-

form generator if either of the COM21:0 bits are set. However, the OC2 pin direction

(input or output) is still controlled by the data direction register (DDR) for the port pin.

The data direction register bit for the OC2 pin (DDR_OC2) must be set as output before

the OC2 value is visible on the pin. The port override function is independent of the

waveform generation mode.

The design of the output compare pin logic allows initialization of the OC2 state before

the output is enabled. Note that some COM21:0 bit settings are reserved for certain

modes of operation.

See “8-bit Timer/Counter Register Description” on page 151.

Compare Output Mode and

Waveform Generation

The waveform generator uses the COM21:0 bits differently in normal, CTC, and PWM

modes. For all modes, setting the COM21:0 = 0 tells the waveform generator that no

action on the OC2 register is to be performed on the next compare match. For compare

output actions in the non-PWM modes refer to

Table 65 on page 152. For fast PWM

mode, refer to

Table 66 on page 152, and for phase correct PWM refer to Table 67 on

page 152

PORT

DDR

OCn

Waveform

Generator

COMn1

COMn0

DATA BU S

FOCn

clk

I/O

1 2 ... 139 140 141 142 143 144 145 146 147 148 149 ... 330 331

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