
209
ATmega128(L)
2467B–09/01
Figure 98. Formats and States in the Master Receiver Mode
Table 88. Status Codes for Master Receiver Mode
Status Code
(TWSR)
Prescaler Bits
are 0
Status of the 2-wire Serial Bus
and 2-wire Serial Interface Hard-
ware
Application Software Response
Next Action Taken by TWI Hardware
To/from TWDR
To TWCR
STA STO TWINT TWEA
$08 A START condition has been
transmitted
Load SLA+R X 0 1 X SLA+R will be transmitted
ACK or NOT ACK will be received
$10 A repeated START condition
has been transmitted
Load SLA+R or
Load SLA+W
X
X
0
0
1
1
X
X
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+W will be transmitted
Logic will switch to master transmitter mode
$38 Arbitration lost in SLA+R or NOT
ACK bit
No TWDR action or
No TWDR action
0
1
0
0
1
1
X
X
2-wire Serial Bus will be released and not addressed
slave mode will be entered
A START condition will be transmitted when the bus
becomes free
$40 SLA+R has been transmitted;
ACK has been received
No TWDR action or
No TWDR action
0
0
0
0
1
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
$48 SLA+R has been transmitted;
NOT ACK has been received
No TWDR action or
No TWDR action or
No TWDR action
1
0
1
0
1
1
1
1
1
X
X
X
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO flag will
be reset
STOP condition followed by a START condition will be
transmitted and TWSTO flag will be reset
$50 Data byte has been received;
ACK has been returned
Read data byte or
Read data byte
0
0
0
0
1
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
$58 Data byte has been received;
NOT ACK has been returned
Read data byte or
Read data byte or
Read data byte
1
0
1
0
1
1
1
1
1
X
X
X
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO flag will
be reset
STOP condition followed by a START condition will be
transmitted and TWSTO flag will be reset
S SLA R A DATA A
$08
$40 $50
SLA R
$10
AP
$48
A or A
$38
Other master
continues
$38
Other master
continues
W
A
$68
Other master
continues
$78 $B0
To corresponding
states in slave mode
MR
MT
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
DATA A
n
From master to slave
From slave to master
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
PDATA A
$58
A
R
S
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