
200
ATmega8515(L)
2512A–AVR–04/02
Table 101. ExternalData Memory Characteristics, 4.5 - 5.5 Volts, SRWn1 = 1,SRWn0 = 0
Symbol Parameter
4 MHz Oscillator Variable Oscillator
UnitMin Max Min Max
01/t
CLCL
OscillatorFrequency 0.0 16MHz
10 t
RLDV
ReadLow to Data Valid325 3.0t
CLCL
-50 ns
12 t
RLRH
RD Pulse Width365 3.0t
CLCL
-10 ns
15 t
DVWH
Data Valid to WR High375 3.0t
CLCL
ns
16 t
WLWH
WRPulse Width365 3.0t
CLCL
-10 ns
Table 102. ExternalData Memory Characteristics, 4.5 - 5.5 Volts, SRWn1 = 1,SRWn0 = 1
Symbol Parameter
4 MHz Oscillator Variable Oscillator
UnitMin Max Min Max
01/t
CLCL
OscillatorFrequency 0.0 16MHz
10 t
RLDV
ReadLow to Data Valid325 3.0t
CLCL
-50 ns
12 t
RLRH
RD Pulse Width365 3.0t
CLCL
-10 ns
14 t
WHDX
Data Hold AfterWR High 240 2.0t
CLCL
-10 ns
15 t
DVWH
Data Valid to WR High375 3.0t
CLCL
ns
16 t
WLWH
WRPulse Width365 3.0t
CLCL
-10 ns
Table 103. ExternalData Memory Characteristics, 2.7-5.5 Volts, No Wait-state
Symbol Parameter
4 MHz Oscillator Variable Oscillator
UnitMin Max Min Max
01/t
CLCL
OscillatorFrequency 0.0 8 MHz
1t
LHLL
ALE Pulse Width 235t
CLCL
-15 ns
2t
AVLL
Address Valid AtoALE Low 115 0.5t
CLCL
-10
(1)
ns
3at
LLAX_ST
Address Hold After ALE Low,
write access
55
ns
3b t
LLAX_LD
Address Hold after ALE Low,
read access
55
ns
4t
AVLLC
Address ValidCto ALE Low 115 0.5t
CLCL
-10
(1)
ns
5t
AVRL
Address Valid to RDLow 2351.0t
CLCL
-15 ns
6 t
AVWL
Address Valid to WR Low 2351.0t
CLCL
-15 ns
7 t
LLWL
ALE Low to WR Low 115 1300.5t
CLCL
-10
(2)
0.5t
CLCL
+5
(2)
ns
8t
LLRL
ALE Low to RDLow 115 1300.5t
CLCL
-10
(2)
0.5t
CLCL
+5
(2)
ns
9 t
DVRH
Data Setup to RDHigh 45 45 ns
10 t
RLDV
ReadLow to Data Valid 1901.0t
CLCL
-60ns
11 t
RHDX
Data Hold After RDHigh 00ns
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