Rainbow-electronics ATmega8515L Uživatelský manuál Strana 38

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ATmega8515(L)
2512A–AVR–04/02
Power Management
and Sleep Modes
Sleep modes enabletheapplication to shut down unused modules in the MCU, thereby
saving power.TheAVRprovides varioussleep modes allowing theuser to tailor the
powerconsumption to theapplication’srequirements.
To enter any of thethree sleep modes, the SE bit in MCUCRmust be written to logic
one and a SLEEPinstruction must beexecuted.The SM2 bit in MCUCSR, the SM1 bit
in MCUCR, and the SM0 bit in the EMCUCR Registerselect which sleep mode (Idle,
Power-down, orStandby) will beactivatedbythe SLEEPinstruction. See Table16for a
summary. If an enabled interruptoccurs whilethe MCU is in a sleep mode, the MCU
wakes up.The MCU is then haltedforfour cycles in addition to the start-up time, it exe-
cutes theinterrupt routine, andresumes execution from theinstruction following SLEEP.
The contents of the registerfileandSRAM are unalteredwhen the device wakes up
from sleep. If aReset occurs during sleep mode, the MCU wakes up and executesfrom
theReset Vector.
Figure17 on page 31 presents the different clock systems in the ATmega8515, and
theirdistribution. The figureishelpful in selecting an appropriate sleep mode.
MCU Control Register
MCUCR
Bit5–SE:SleepEnable
The SE bit must be written to logic onetomakethe MCU enter the sleep mode when the
SLEEPinstruction is executed.Toavoid the MCU entering the sleep modeunless it is
the programmers purpose, it isrecommended to write the SleepEnable (SE) bit to one
just beforetheexecution of the SLEEPinstruction and to clear it immediately afterwak-
ing up.
Bit 4 SM1: Sleep Mode Select Bit 1
The SleepMode Select bitsselect between thethree available sleep modes asshown
in Table16.
MCU Control and Status
Register – MCUCSR
Bit 5 SM2: Sleep Mode Select Bit 2
The SleepMode Select bitsselect between thethree available sleep modes asshown
in Table16.
Extended MCU Control
Register – EMCUCR
Bit 76543 210
SRE SRW10 SE SM1 ISC11 ISC10 ISC01 ISC00 MCUCR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543 210
–SM2 WDRF BORF EXTRF PORF MCUCSR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543 210
SM0
SRL2 SRL1 SRL0 SRW01 SRW00 SRW11 ISC2 EMCUCR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
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