82
ATmega8515(L)
2512A–AVR–04/02
Modes of Operation Themodeof operation, i.e., the behavior of theTimer/Counter and the output compare
pins, isdefinedbythe combination of the Waveform Generation mode (WGM01:0) and
Compare Output mode (COM01:0)bits.The Compare Output mode bitsdonotaffect
the counting sequence,whilethe Waveform Generation mode bitsdo. The COM01:0
bitscontrolwhether thePWM output generatedshould beinverted or not (inverted or
non-inverted PWM). For non-PWM modes the COM01:0 bitscontrolwhether the output
should be set,cleared, or toggled at a comparematch (See “Compare Match Output
Unit” on page 81.).
Fordetailed timing information refer to Figure40,Figure41,Figure42, andFigure43 in
“Timer/Counter Timing Diagrams”onpage 86.
Normal Mode The simplestmodeof operation is the Normal mode (WGM01:0 = 0). Inthis modethe
counting direction is always up(incrementing), and no counterclear isperformed.The
countersimply overrunswhen it passes its maximum 8-bit value (TOP = 0xFF) and then
restartsfrom the bottom (0x00). Innormal operation theTimer/CounterOverflowFlag
(TOV0)will be set in the same timerclock cycleas theTCNT0 becomeszero. The
TOV0 flag in thiscase behaveslikeaninthbit, exceptthat it is only set, not cleared.
However, combinedwith thetimer overflow interruptthat automatically clears theTOV0
flag, thetimerresolution can beincreasedbysoftware. Therearenospecialcases to
consider in the Normal mode, anewcounter value can be written anytime.
Theoutput compare unit can beused to generate interrupts at some given time. Using
the output comparetogenerate waveforms in Normal modeis not recommended, since
thiswill occupy too much of the CPU time.
Clear Timer on Compare
Match (CTC) Mode
In Clear Timer on CompareorCTC mode (WGM01:0 = 2), the OCR0 Register is used to
manipulate the counterresolution. In CTC modethe counter iscleared to zero when the
counter value (TCNT0) matches the OCR0. The OCR0 defines thetop value for the
counter, hencealsoitsresolution. This modeallows greatercontrol of the compare
match output frequency. Italso simplifies theoperation ofcounting external events.
The timing diagram for the CTC modeisshowninFigure 37.The counter value
(TCNT0) increases until a comparematch occurs between TCNT0 andOCR0, and then
counter(TCNT0) iscleared.
Figure 37. CTCMode, Timing Diagram
An interrupt can begenerated each time the counter value reaches theTOPvalue by
using the OCF0 flag. If theinterruptis enabled, theinterrupt handlerroutine can beused
for updating theTOPvalue. However, changing TOPtoavalue closetoBOTTOM when
TCNTn
OCn
(Toggle)
OCn Interrupt Flag Set
1 4
Period
2 3
(COMn1:0 = 1)
(151 stránky)
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